Now let us look at what happens when the source's backend readReady is NOT high. Let's say that the backend device on that register is a simple on/off switch whose readReady goes high whenever the switch is flipped, and low again after the register is read.

       *** EVERYTHING STOPS. ***

The 3-input AND gate shown above in the source RCL merely stays low. Copy in progress and EN-OUT are not set. At that point, nothing flows. The loop is like a circular road filed with cars that suddenly has a wall placed across it. It doesn't matter at what point in the circle that wall appears: nothing moves behind it, nothing moves ahead of it.

Most of us are not used to a circuit like this that has no clock. Not a single transistor anywhere in this entire WIZ's frontend will be switching.

The WIZ simply "stops". It is in a zero-power-using state, "waiting" until somebody flips that external switch. If may take a minute, an hour, or a century before that switch is flipped, and our circuit will just sit there, consuming no power, "waiting" for it.

(Of course, this is just one WIZ. Thousands of other WIZes on the same chip may still be running.)

In a clocked system, the clock would keep flipping, driving a huge capacitive load and flipping thousands of attached transistors across the entire circuit. Some systems apply "clock gating" to shut off the clock in non-active areas, or have special "sleep" modes, but this has a very large granularity. On a WIZ chip, one instruction on one WIZ simply stops, consuming no power.

(A fun -- and somehow related -- fact: A typical microwave oven consumes more power to run the clock than to microwave food! Because while microwaving food takes hundreds of times more power on an instantaneous basis, most microwave ovens sit idle most of the time, while their clocks continue to run all the time!)